INSOTEC NEWS & UPDATES

AMD Phenom is BROKEN - Costs a 14% performance hit to fix

We recently published our AMD vs. Intel Dual Core comparison, which led some to wonder why we didn’t compare their quad-core chips instead. As I stated in the review, one reason was that we simply wanted to write a CPU review discussing products that more people can afford; even the high-end dual-core processors we looked at were all under $200. The cheapest quad-core is in the $300 range, both for Intel and AMD. The other problem was that we simply didn’t have a Phenom to test. We have to buy our AMD processors for review, and I hadn’t gotten around to that. I originally wanted to wait until they got their 2.4 GHz part fixed, so I could test the full Phenom lineup.

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How wrong I was.

As it turns out, the Phenom launch has been plagued with nothing but blunders, and it may go down in history as one of the worst PC hardware launches in history.

First of all, it wasn’t just the 2.4 GHz part that is affected by the erratum - it’s the entire lineup of Phenom processors, along with all Barcelona Opterons. Basically, the problem is with the CPU’s translation lookaside buffer (TLB) and L3 cache, and can cause system crashes and data corruption. The specifics are as follows: Erratum 298 will be described as follows:

"The processor operation to change the accessed or dirty bits of a page translation table entry in the L2 from 0b to 1b may not be atomic. A small window of time exists where other cached operations may cause the stale page translation table entry to be installed in the L3 before the modified copy is returned to the L2. In addition, if a probe for this cache line occurs during this window of time, the processor may not set the accessed or dirty bit and may corrupt data for an unrelated cached operation. The system may experience a machine check event reporting an L3 protocol error has occurred. In this case, the MC4 status register (MSR 0000_0410) will be equal to B2000000_000B0C0F or BA000000_000B0C0F. The MC4 address register (MSR 0000_0412) will be equal to 26h."

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